IITB have developed a nonvolatile floating gate analog memory cell. The invention ensures accurate storage of charge and which reproduces the analog signal correctly if power outage or sudden shut down takes place. The nonvolatile floating gate analog memory cell has high resolution, has good linearity, is robust, is compact, is economical, reduces programming time and performs independent of the variations in the intrinsic threshold voltage.

The nonvolatile floating gate analog memory cell has a source and drain formed on an insulator body. The source and drain are separated by a channel. A floating gate formed on one side of the source and drain. It has a control gate formed on one side of the floating gate that is connected to a voltage. It has a back gate formed on the other side of the source and drain that is connected to a voltage. The channel is separated from the floating gate and the back gate by an insulation layer. The control gate is separated from the floating gate by an insulation layer. The source and drain are insolated from the control gate, back gate and floating gate by a spacer.

The memory cell has a floating gate formed on the other side of the source and the drain. The floating gate is separated from the channel and the back gate by insulation layers marked. The voltage is greater than the intrinsic threshold voltage of the transistor. The voltage turns on the transistor and causes the channel between the source and the drain to be inverted. The voltage is the analog signal or information signal. During the programming of the analog memory the voltage at the back gate changes the programmed threshold voltage so that the charge stored in the analog cell corresponds to the analog signal. In this way the nonvolatile floating gate analog memory cell design provides greater efficiency.

Indian patent application no. 2217/MUM/2008 Patent grant no.
Inventors: V.R . Rao, D.K. Sharma, M.Shojaei Bhagini, Mayank Shrivastava